Jetway-computer NF9B Instrukcja Użytkownika

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TECHNICAL MANUAL
Of
Intel Cedar Trail-D & NM10 Chipset
Based
Mini-ITX M/B for ATOM Processor
NO.
G03-NF9B-F
Revision: 1.0
Release date: April 24, 2012
Trademark:
* Specifications and Information contained in this documentation are furnished for information use only, and are
subject to change at any time without notice, and should not be construed as a commitment by manufacturer.
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Podsumowanie treści

Strona 1 - G03-NF9B-F

TECHNICAL MANUAL Of Intel Cedar Trail-D & NM10 Chipset Based Mini-ITX M/B for ATOM Processor NO. G03-NF9B-F Revision: 1.0 Release date: Apr

Strona 2

5 Motherboard Jumper Position COPENJP1JP2 JP13JP5JP6JP17JP9JP3JP12 JBATJP14

Strona 3 - TABLE OF CONTENT

6 Connectors Connector Name ATXPWR ATX Power Connector HDMI High-Definition Multimedia Interface VGA1/VGA2 Video Graphic Attach Connector COM1/COM

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7 Jumper Jumper Name Description JBAT CMOS RAM Clear Function Setting 3-Pin Block JP1 UL1/UL2 USB Ports Power On Function Select 3-Pin Block JP5

Strona 5 - Item Checklist

8Chapter 2 Hardware Installation 2-1 Jumper Setting (1) JBAT (3-pin): Clear CMOS 2-3 closed : Clear CMOSJBAT JBAT131-2 closed: Normal;1 3 (2) J

Strona 6 - Chapter 1

9(3) JP5 (3-pin): USB 2/3 Header Power On Function Select 2-3 closed: USB 2/3 Header Power on Enabled JP5JP51-2 closed : USB 2/3 Header Power on Dis

Strona 7 - 1-2 Specification

10 (5) JP3 (3-pin): INVERTER1 VCC 12V/5V Select JP3JP313131-2 closed:Inverter1 VCC=12V (default) 2-3 closed:Inverter1 VCC=5V (6) JP13 (3

Strona 8

11(7) JP12 (3-pin): INVERTER2 VCC 12V/5V Select JP12JP1213131-2 closed:Inverter2 VCC=12V (default); 2-3 closed:Inverter2 VCC=5V (8

Strona 9 - LED Header

12(12) JP17 (6-pin): COM6 Header RS232/485/422 Function Select 3-4 closed : RS485; JP17 11-2 closed: RS232;1 15-6 closed : RS422 (13)COP

Strona 10 - Motherboard Jumper Position

13(14) JP6 (3-pin): Mini PCI-E Power 3.3V/ 3VSB Function Select 2-3 closed:MINI PCI-E Power=3VSB JP6JP61-2 closed:MINI PCI-E Power= VCC 3.3V; 1

Strona 11 - Headers

14z Open: in which user leave jumper hat just in pin 2, pin4, pin6 or pin8. Jumper Setting Description Panel Resolution Color Depth 1 2 Pin 1-2

Strona 12 - Jumper Name Description

i Environmental Protection Announcement Do not dispose this electronic device into the trash while di

Strona 13 - Hardware Installation

15 1 2 Pin 1-2: Open Pin 3-4: Open Pin 5-6: Short Pin 7-8: Open 1440 x 1050 @ 60Hz 24-bit 1 2 Pin 1-2: Short Pin 3-4: Short Pin 5-6: Open Pin

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16(2) SATA1, SATA2, SATA3, SATA4(7-pin block):SATA Port connectors SATA1 and SATA2 connectors are SATAII connectors. SATA3 and SATA4 connectors are S

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172-2-2 Headers (1) FP_AUDIO1 (10-pin): Front Panel Audio Header This header connects to front panel Line-out, MIC-In connector with cable.

Strona 16 - 1-2 closed: RS232;

18(3) USB2 (4-pin): USB 2.0 Port Header USB2 Header Pin 1VCC -DATA GND +DATA (4) USB3 (10-pin): USB 2.0 Port Header Pin 1USB3 Header

Strona 17 - Case Open Display Function

19(5) KBMS (6-pin): PS/2 Keyboard & Mouse Header GND KB_CLK KB_DATA Pin1MS_DATA VCC MS_CLK (7) GPIO_CON(10-pin): GPIO Header

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20(8) COM3/COM4/COM5/COM6 (10-pin): Serial Port Header 6 DSR RI CTS RTS GNDTXDDTR5Pin110 RXDDCDSerial Port Header (9) TX-RXCOM (4-pin): RS4

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21(10) SPEAK (4-pin): Speaker Header This 4-pin header connects to the case-mounted speaker. See the figure below. (11) Power LED (3-pin): PW

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22(13) CPUFAN, SYSFAN1, SYSFAN2 (3-pin): FAN Speed Headers Pin1: GND Pin2: +12V fan power Pin3: Fan Speed SYSFAN1Pin13CPUFAN SYSFAN2 Pin13

Strona 21

23(15) LVDS1(32-pin): 24-bit dual channel LVDS Header Pin 1LVDS1 Header Pin 2 Pin NO. Pin Define Pin NO. Pin Define Pin 1 LVDSB_DATAN3

Strona 22 - 2-2-2 Headers

24(16) LVDS2(32-pin): 24-bit single channel LVDS Header Pin 1LVDS2 Header Pin 2 Pin NO. Pin Definition Pin NO. Pin Definition Pin 1 N

Strona 23 - USB2 Header

ii ENVIRONMENTAL SAFETY INSTRUCTION...

Strona 24 - GPIO_CON Header

25(17) PARALLEL (26-pin): Parallel Port Header Pin 1Parallel Header Pin 2 Pin NO. Pin Definition Pin NO. Pin Definition Pin 1 STB- Pi

Strona 25 - Serial Port Header

26Chapter 3 Introducing BIOS Notice! The BIOS options in this manual are for reference only. Different configurations may lead to difference in BIOS

Strona 26 - PWRLED

273-2 BIOS Menu Screen The following diagram show a general BIOS menu screen: 3-3 Function Keys In the above BIOS Setup main menu, you can see

Strona 27 - INVERTER

28z Press <Enter> to select. z Press <+>/<–> key when you want to modify the BIOS parameters for the active option. z [F1]: Pre

Strona 28 - LVDS1 Header

293-6 Main Menu Main menu screen includes some basic system information. Highlight the item and then use the <+> / <-> key or numerical k

Strona 29 -

30 3-7 Advanced Menu Scroll down to view more setting items…

Strona 30 - Parallel Header

31Legacy OpROM Support: Launch External PxE OpROM/Launch LAN1 PXE OpROM//Launch LAN1 PXE OpROM Use this item to enable or disable boot option for le

Strona 31 - Introducing BIOS

32PCI Common Settings: PCI Latency Timer Use this item to set value to be programmed into PCI latency timer register. VGA Palette Snoop Use this item

Strona 32 - 3-3 Function Keys

33The optional settings are: [Disabled]; [Enabled].Set as [Enabled] for Windows XP and Linux (OS optimized for Hyper-Threading Technology) and [Disab

Strona 33 - 3-5 Menu Bar

34[Manual].Select [Manual] you can set value for the following sub-item: Device Power-up delay: the delay range in from 1 to 40 seconds in one seco

Strona 34 - 3-6 Main Menu

iii Environmental Safety Instruction z Avoid the dusty, humidity and temperature extremes. Do not

Strona 35 - 3-7 Advanced Menu

35► PC Health Status Press [Enter] to view hardware health status. ► Second Super I/O Configuration ► COM3 /COM4 /COM5 Port Configuration Press [En

Strona 36

36► Watchdog Configuration WatchDog Timer Control Use this item to enable or disable WatchDog Timer Control. When set as [Enabled], the following su

Strona 37

373-8 Chipset Menu ► Host Bridge Press [Enter], user can have a view of memory information and make settings for Intel IGD Configuration: Intel IGD

Strona 38

38Use this item to set the video device which will be activated during POST. This has no effect if external graphics presents. The optional setting

Strona 39

39The optional settings are: [Enabled]; [Disabled]. SLP_S4 Assertion Width Use this item to select a minimum assertion width of the SLP_S4# signal.

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40Quiet Boot The optional settings are: [Enabled]; [Disabled]. Gate A20 Active The optional settings are: [Upon Request]; [Always]. Option ROM Messag

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41Security menu allow users to change administrator password and user password settings. 3-11 Save & Exit Menu Save Changes and Reset This item

Strona 42 - 3-8 Chipset Menu

42Use this item to save the changes done so far as user defaults. Restore User Defaults Use this item to restore defaults to all the setup options.

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iv USER’S NOTICE COPYRIGHT OF THIS MANUAL BELONGS TO THE MANUFACTURER. NO PART OF THIS MANUAL, INCLUDING

Strona 44 - 3-9 Boot Menu

1Chapter 1 Introduction of the Motherboard 1-1 Feature of Motherboard z Intel Cedar Trail-D and NM10 chipset, with low power consumption never de

Strona 45 - 3-10 Security Menu

21-2 Specification Spec Description Design z Mini-ITX form factor; PCB size: 17.0x17.0cm Chipset z Intel®NM10 Express chipset Embedded CPU z I

Strona 46 - 3-11 Save & Exit Menu

3z 9-pin USB 2.0 header x1 z GPIO header x1 z LVDS1 connector:24- bit dual channel LVDS header x1 z LVDS2 connector:24- bit single channel LVDS hea

Strona 47 - Restore User Defaults

4 ATX Power ConnectorUSB 2.0 HeadersHDMI Port RJ-45 LAN Port over USB 2.0 Ports Front Panel Audio HeaderPower LED HeaderCPUFAN HeaderInvert

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